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/*******************************************************************************
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* File Name: CyFlash.c
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* Version 5.0
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*
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* Description:
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* Provides an API for the FLASH.
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*
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* Note:
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* This code is endian agnostic.
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*
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* Note:
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* Documentation of the API's in this file is located in the
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* System Reference Guide provided with PSoC Creator.
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*
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********************************************************************************
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* Copyright 2010-2015, Cypress Semiconductor Corporation. All rights reserved.
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* You may use this file only in accordance with the license, terms, conditions,
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* disclaimers, and limitations in the end user license agreement accompanying
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* the software package with which this file was provided.
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*******************************************************************************/
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#include "CyFlash.h"
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/*******************************************************************************
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* Cypress identified a defect with the Flash write functionality of the
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* PSoC 4000, PSoC 4100, and PSoC 4200 devices. The CySysFlashWriteRow() function
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* now checks the data to be written and, if necessary, modifies it to have a
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* non-zero checksum. After writing to Flash, the modified data is replaced
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* (Flash program) with the correct (original) data.
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*******************************************************************************/
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#define CY_FLASH_CHECKSUM_WORKAROUND (CY_PSOC4_4000 || CY_PSOC4_4100 || CY_PSOC4_4200)
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#if (CY_IP_FM || (CY_IP_FMLT && CY_IP_SPCIF_SYNCHRONOUS))
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static CY_SYS_FLASH_CLOCK_BACKUP_STRUCT cySysFlashBackup;
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#endif /* (CY_IP_FM || (CY_IP_FMLT && CY_IP_SPCIF_SYNCHRONOUS)) */
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static cystatus CySysFlashClockBackup(void);
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static cystatus CySysFlashClockRestore(void);
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#if(CY_IP_FMLT)
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static cystatus CySysFlashClockConfig(void);
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#endif /* (CY_IP_FMLT) */
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/*******************************************************************************
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* Function Name: CySysFlashWriteRow
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********************************************************************************
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*
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* Summary:
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* Erases a row of Flash and programs it with the new data.
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*
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* Parameters:
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* uint16 rowNum:
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* The flash row number. The number of the flash rows is defined by the
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* CY_FLASH_NUMBER_ROWS macro for the selected device. Refer to the device
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* datasheet for the details.
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*
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* uint8* rowData:
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* Array of bytes to write. The size of the array must be equal to the flash
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* row size. The flash row size for the selected device is defined by
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* the CY_FLASH_SIZEOF_ROW macro. Refer to the device datasheet for the
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* details.
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*
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* Return:
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* Status
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* Value Description
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* CY_SYS_FLASH_SUCCESS Successful
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* CY_SYS_FLASH_INVALID_ADDR Specified flash row address is invalid
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* CY_SYS_FLASH_PROTECTED Specified flash row is protected
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* Other non-zero Failure
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*
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* Side Effects:
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* The IMO must be enabled before calling this function. The operation of the
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* flash writing hardware is dependent on the IMO.
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*
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* For PSoC 4000, PSoC 4100 BLE and PSoC 4200 BLE devices (PSoC 4100 BLE and
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* PSoC 4200 BLE devices with 256K of Flash memory are not affected), this API
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* will automatically modify the clock settings for the device. Writing to
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* flash requires that changes be made to the IMO and HFCLK settings. The
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* configuration is restored before returning. This will impact the operation
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* of most of the hardware in the device.
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*
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* For PSoC 4000 devices this API will automatically modify the clock settings
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* for the device. Writing to flash requires that changes be made to the IMO
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* and HFCLK settings. The configuration is restored before returning. HFCLK
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* will have several frequency changes during the operation of this API between
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* a minimum frequency of the current IMO frequency divided by 8 and a maximum
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* frequency of 12 MHz. This will impact the operation of most of the hardware
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* in the device.
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*
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*******************************************************************************/
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uint32 CySysFlashWriteRow(uint32 rowNum, const uint8 rowData[])
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{
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volatile uint32 retValue = CY_SYS_FLASH_SUCCESS;
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volatile uint32 clkCnfRetValue = CY_SYS_FLASH_SUCCESS;
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volatile uint32 parameters[(CY_FLASH_SIZEOF_ROW + CY_FLASH_SRAM_ROM_DATA) / sizeof(uint32)];
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uint8 interruptState;
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#if (CY_FLASH_CHECKSUM_WORKAROUND)
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uint32 needChecksumWorkaround = 0u;
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uint32 savedIndex = 0u;
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uint32 savedValue = 0u;
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uint32 checksum = 0u;
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uint32 bits = 0u;
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uint32 i;
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#endif /* (CY_FLASH_CHECKSUM_WORKAROUND) */
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if ((rowNum < CY_FLASH_NUMBER_ROWS) && (rowData != 0u))
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{
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/* Copy data to be written into internal variable */
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(void)memcpy((void *)¶meters[2u], rowData, CY_FLASH_SIZEOF_ROW);
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#if (CY_FLASH_CHECKSUM_WORKAROUND)
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for (i = 2u; i < ((CY_FLASH_SIZEOF_ROW / sizeof(uint32)) + 2u); i++)
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{
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uint32 tmp = parameters[i];
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if (tmp != 0u)
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{
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checksum += tmp;
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bits |= tmp;
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savedIndex = i;
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}
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}
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needChecksumWorkaround = ((checksum == 0u) && (bits != 0u)) ? 1u : 0u;
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if (needChecksumWorkaround != 0u)
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{
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savedValue = parameters[savedIndex];
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parameters[savedIndex] = 0u;
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}
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#endif /* (CY_FLASH_CHECKSUM_WORKAROUND) */
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/* Load Flash Bytes */
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parameters[0u] = (uint32) (CY_FLASH_GET_MACRO_FROM_ROW(rowNum) << CY_FLASH_PARAM_MACRO_SEL_OFFSET) |
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(uint32) (CY_FLASH_PAGE_LATCH_START_ADDR << CY_FLASH_PARAM_ADDR_OFFSET ) |
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(uint32) (CY_FLASH_KEY_TWO(CY_FLASH_API_OPCODE_LOAD) << CY_FLASH_PARAM_KEY_TWO_OFFSET ) |
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CY_FLASH_KEY_ONE;
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parameters[1u] = CY_FLASH_SIZEOF_ROW - 1u;
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CY_FLASH_CPUSS_SYSARG_REG = (uint32) ¶meters[0u];
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CY_FLASH_CPUSS_SYSREQ_REG = CY_FLASH_CPUSS_REQ_START | CY_FLASH_API_OPCODE_LOAD;
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retValue = CY_FLASH_API_RETURN;
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if(retValue == CY_SYS_FLASH_SUCCESS)
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{
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/***************************************************************
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* Mask all the exceptions to guarantee that Flash write will
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* occur in the atomic way. It will not affect system call
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* execution (flash row write) since it is executed in the NMI
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* context.
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***************************************************************/
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interruptState = CyEnterCriticalSection();
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clkCnfRetValue = CySysFlashClockBackup();
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#if(CY_IP_FMLT)
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if(clkCnfRetValue == CY_SYS_FLASH_SUCCESS)
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{
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retValue = CySysFlashClockConfig();
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}
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#endif /* (CY_IP_FMLT) */
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if(retValue == CY_SYS_FLASH_SUCCESS)
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{
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/* Write Row */
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parameters[0u] = (uint32) (((uint32) CY_FLASH_KEY_TWO(CY_FLASH_API_OPCODE_WRITE_ROW) << CY_FLASH_PARAM_KEY_TWO_OFFSET) | CY_FLASH_KEY_ONE);
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parameters[0u] |= (uint32)(rowNum << 16u);
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CY_FLASH_CPUSS_SYSARG_REG = (uint32) ¶meters[0u];
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CY_FLASH_CPUSS_SYSREQ_REG = CY_FLASH_CPUSS_REQ_START | CY_FLASH_API_OPCODE_WRITE_ROW;
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retValue = CY_FLASH_API_RETURN;
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}
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#if (CY_FLASH_CHECKSUM_WORKAROUND)
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if ((retValue == CYRET_SUCCESS) && (needChecksumWorkaround != 0u))
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{
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(void)memset((void *)¶meters[2u], 0, CY_FLASH_SIZEOF_ROW);
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parameters[savedIndex] = savedValue;
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/* Load Flash Bytes */
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parameters[0u] = (uint32) (CY_FLASH_GET_MACRO_FROM_ROW(rowNum) << CY_FLASH_PARAM_MACRO_SEL_OFFSET) |
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(uint32) (CY_FLASH_PAGE_LATCH_START_ADDR << CY_FLASH_PARAM_ADDR_OFFSET ) |
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(uint32) (CY_FLASH_KEY_TWO(CY_FLASH_API_OPCODE_LOAD) << CY_FLASH_PARAM_KEY_TWO_OFFSET ) |
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CY_FLASH_KEY_ONE;
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parameters[1u] = CY_FLASH_SIZEOF_ROW - 1u;
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CY_FLASH_CPUSS_SYSARG_REG = (uint32) ¶meters[0u];
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CY_FLASH_CPUSS_SYSREQ_REG = CY_FLASH_CPUSS_REQ_START | CY_FLASH_API_OPCODE_LOAD;
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retValue = CY_FLASH_API_RETURN;
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if(retValue == CY_SYS_FLASH_SUCCESS)
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{
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/* Program Row */
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parameters[0u] =
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(uint32) (((uint32) CY_FLASH_KEY_TWO(CY_FLASH_API_OPCODE_PROGRAM_ROW) <<
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CY_FLASH_PARAM_KEY_TWO_OFFSET) | CY_FLASH_KEY_ONE);
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parameters[0u] |= (uint32)(rowNum << 16u);
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CY_FLASH_CPUSS_SYSARG_REG = (uint32) ¶meters[0u];
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CY_FLASH_CPUSS_SYSREQ_REG = CY_FLASH_CPUSS_REQ_START | CY_FLASH_API_OPCODE_PROGRAM_ROW;
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retValue = CY_FLASH_API_RETURN;
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}
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}
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#endif /* (CY_FLASH_CHECKSUM_WORKAROUND) */
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if(clkCnfRetValue == CY_SYS_FLASH_SUCCESS)
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{
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clkCnfRetValue = CySysFlashClockRestore();
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}
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CyExitCriticalSection(interruptState);
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}
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}
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else
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{
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retValue = CY_SYS_FLASH_INVALID_ADDR;
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}
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return (retValue);
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}
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/*******************************************************************************
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* Function Name: CySysFlashSetWaitCycles
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********************************************************************************
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*
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* Summary:
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* Sets the number of clock cycles the cache will wait before it samples data
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* coming back from Flash. This function must be called before increasing the
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* SYSCLK clock frequency. It can optionally be called after lowering SYSCLK
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* clock frequency in order to improve the CPU performance.
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*
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* Parameters:
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* freq: The System clock frequency in MHz. Note: Invalid frequency will be
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* ignored in Release mode and the CPU will be halted if project is compiled in
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* Debug mode.
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*
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* Return:
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* None
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*
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*******************************************************************************/
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void CySysFlashSetWaitCycles(uint32 freq)
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{
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uint8 interruptState;
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interruptState = CyEnterCriticalSection();
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#if (CY_IP_CPUSS)
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if ( freq <= CY_FLASH_SYSCLK_BOUNDARY_MHZ )
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{
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CY_SYS_CLK_SELECT_REG &= (uint32)(~CY_FLASH_WAIT_STATE_EN);
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}
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else
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{
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CY_SYS_CLK_SELECT_REG |= CY_FLASH_WAIT_STATE_EN;
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}
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#else
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if (freq <= CY_FLASH_CTL_WS_0_FREQ_MAX)
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{
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CY_FLASH_CTL_REG = (CY_FLASH_CTL_REG & ~CY_FLASH_CTL_WS_MASK) | CY_FLASH_CTL_WS_0_VALUE;
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} else
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if (freq <= CY_FLASH_CTL_WS_1_FREQ_MAX)
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{
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CY_FLASH_CTL_REG = (CY_FLASH_CTL_REG & ~CY_FLASH_CTL_WS_MASK) | CY_FLASH_CTL_WS_1_VALUE;
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} else
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#if (CY_IP_FMLT || CY_IP_S8FS)
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if (freq <= CY_FLASH_CTL_WS_2_FREQ_MAX)
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{
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CY_FLASH_CTL_REG = (CY_FLASH_CTL_REG & ~CY_FLASH_CTL_WS_MASK) | CY_FLASH_CTL_WS_2_VALUE;
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}
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else
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#endif /* (CY_IP_FMLT || CY_IP_S8FS) */
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{
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/* Halt CPU in debug mode if frequency is invalid */
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CYASSERT(0u != 0u);
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}
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#endif /* (CY_IP_CPUSS) */
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CyExitCriticalSection(interruptState);
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}
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/*******************************************************************************
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* Function Name: CySysFlashClockBackup
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********************************************************************************
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*
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* Summary:
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* Backups the device clock configuration.
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*
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* Parameters:
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* None
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*
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* Return:
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* The same as CySysFlashWriteRow().
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*
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*******************************************************************************/
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static cystatus CySysFlashClockBackup(void)
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{
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cystatus retValue = CY_SYS_FLASH_SUCCESS;
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#if(!CY_IP_FM)
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#if !(CY_PSOC4_4000)
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#if (CY_IP_SPCIF_SYNCHRONOUS)
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volatile uint32 parameters[2u];
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#endif /* (CY_IP_SPCIF_SYNCHRONOUS) */
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#endif /* !(CY_PSOC4_4000) */
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#endif /* (!CY_IP_FM) */
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#if(CY_IP_FM)
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/***************************************************************
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* Preserve IMO configuration that could be changed during
|
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* system call execution (Cypress ID #150448).
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***************************************************************/
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cySysFlashBackup.imoConfigReg = CY_SYS_CLK_IMO_CONFIG_REG;
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#else /* (CY_IP_FMLT) */
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#if (CY_PSOC4_4000)
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/***************************************************************************
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* Perform firmware clock settings backup for the PSOC4 4000 devices (the
|
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* corresponding system call is not available).
|
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***************************************************************************/
|
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|
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/***************************************************************************
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* The registers listed below are modified by CySysFlashClockConfig().
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*
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* The registers to be saved:
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* - CY_SYS_CLK_IMO_CONFIG_REG - IMO enable state.
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* - CY_SYS_CLK_SELECT_REG - HFCLK source, divider, pump source. Save
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* entire register as it can be directly
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* written on restore (no special
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* requirements).
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* - CY_SYS_CLK_IMO_SELECT_REG - Save IMO frequency.
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*
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* The registers not to be saved:
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* - CY_SYS_CLK_IMO_TRIM1_REG - No need to save. Function of frequency.
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* Restored by CySysClkWriteImoFreq().
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* - CY_SYS_CLK_IMO_TRIM3_REG - No need to save. Function of frequency.
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* Restored by CySysClkWriteImoFreq().
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* - REG_CPUSS_FLASH_CTL - Flash wait cycles. Unmodified due to system
|
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* clock 16 MHz limit.
|
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***************************************************************************/
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cySysFlashBackup.clkSelectReg = CY_SYS_CLK_SELECT_REG;
|
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cySysFlashBackup.clkImoEna = CY_SYS_CLK_IMO_CONFIG_REG & CY_SYS_CLK_IMO_CONFIG_ENABLE;
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cySysFlashBackup.clkImoFreq = CY_SYS_CLK_IMO_MIN_FREQ_MHZ + (CY_SYS_CLK_IMO_SELECT_REG << 2u);
|
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|
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#else
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|
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#if (CY_IP_SPCIF_SYNCHRONOUS)
|
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/* FM-Lite Clock Backup System Call */
|
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parameters[0u] =
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(uint32) ((CY_FLASH_KEY_TWO(CY_FLASH_API_OPCODE_CLK_BACKUP) << CY_FLASH_PARAM_KEY_TWO_OFFSET) |
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CY_FLASH_KEY_ONE);
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parameters[1u] = (uint32) &cySysFlashBackup.clockSettings[0u];
|
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CY_FLASH_CPUSS_SYSARG_REG = (uint32) ¶meters[0u];
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CY_FLASH_CPUSS_SYSREQ_REG = CY_FLASH_CPUSS_REQ_START | CY_FLASH_API_OPCODE_CLK_BACKUP;
|
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retValue = CY_FLASH_API_RETURN;
|
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#endif /* (CY_IP_SPCIF_SYNCHRONOUS) */
|
|
|
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#endif /* (CY_PSOC4_4000) */
|
|
|
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#endif /* (CY_IP_FM) */
|
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|
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return (retValue);
|
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}
|
|
|
|
|
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#if(CY_IP_FMLT)
|
|
/*******************************************************************************
|
|
* Function Name: CySysFlashClockConfig
|
|
********************************************************************************
|
|
*
|
|
* Summary:
|
|
* Configures the device clocks for the flash writing.
|
|
*
|
|
* Parameters:
|
|
* None
|
|
*
|
|
* Return:
|
|
* The same as CySysFlashWriteRow().
|
|
*
|
|
*******************************************************************************/
|
|
static cystatus CySysFlashClockConfig(void)
|
|
{
|
|
cystatus retValue = CY_SYS_FLASH_SUCCESS;
|
|
|
|
/***************************************************************************
|
|
* The FM-Lite IP uses the IMO at 48MHz for the pump clock and SPC timer
|
|
* clock. The PUMP_SEL and HF clock must be set to IMO before calling Flash
|
|
* write or erase operation.
|
|
***************************************************************************/
|
|
#if (CY_PSOC4_4000)
|
|
|
|
/***************************************************************************
|
|
* Perform firmware clock settings setup for the PSOC4 4000 devices (the
|
|
* corresponding system call is not reliable):
|
|
* - The IMO frequency should be 48 MHz
|
|
* - The IMO should be source for the HFCLK
|
|
* - The IMO should be the source for the charge pump clock
|
|
*
|
|
* Note The structure members used below are initialized by
|
|
* the CySysFlashClockBackup() function.
|
|
***************************************************************************/
|
|
if ((cySysFlashBackup.clkImoFreq != 48u) ||
|
|
((cySysFlashBackup.clkSelectReg & CY_SYS_CLK_SELECT_DIRECT_SEL_MASK) != CY_SYS_CLK_HFCLK_IMO) ||
|
|
(((cySysFlashBackup.clkSelectReg >> CY_SYS_CLK_SELECT_PUMP_SEL_SHIFT) & CY_SYS_CLK_SELECT_PUMP_SEL_MASK) !=
|
|
CY_SYS_CLK_SELECT_PUMP_SEL_IMO))
|
|
{
|
|
/***********************************************************************
|
|
Set HFCLK divider to divide-by-4 to ensure that System clock frequency
|
|
* is within the valid limit (16 MHz for the PSoC4 4000).
|
|
***********************************************************************/
|
|
CySysClkWriteHfclkDiv(CY_SYS_CLK_HFCLK_DIV_4);
|
|
|
|
/* The IMO frequency should be 48 MHz */
|
|
if (cySysFlashBackup.clkImoFreq != 48u)
|
|
{
|
|
CySysClkWriteImoFreq(48u);
|
|
}
|
|
CySysClkImoStart();
|
|
|
|
/* The IMO should be source for the HFCLK */
|
|
CySysClkWriteHfclkDirect(CY_SYS_CLK_HFCLK_IMO);
|
|
|
|
/* The IMO should be the source for the charge pump clock */
|
|
CY_SYS_CLK_SELECT_REG = (CY_SYS_CLK_SELECT_REG &
|
|
((uint32)~(uint32)(CY_SYS_CLK_SELECT_PUMP_SEL_MASK << CY_SYS_CLK_SELECT_PUMP_SEL_SHIFT))) |
|
|
((uint32)((uint32)1u << CY_SYS_CLK_SELECT_PUMP_SEL_SHIFT));
|
|
}
|
|
|
|
#else
|
|
|
|
#if (CY_IP_SPCIF_SYNCHRONOUS)
|
|
/* FM-Lite Clock Configuration */
|
|
CY_FLASH_CPUSS_SYSARG_REG =
|
|
(uint32) ((CY_FLASH_KEY_TWO(CY_FLASH_API_OPCODE_CLK_CONFIG) << CY_FLASH_PARAM_KEY_TWO_OFFSET) |
|
|
CY_FLASH_KEY_ONE);
|
|
CY_FLASH_CPUSS_SYSREQ_REG = CY_FLASH_CPUSS_REQ_START | CY_FLASH_API_OPCODE_CLK_CONFIG;
|
|
retValue = CY_FLASH_API_RETURN;
|
|
#endif /* (CY_IP_SPCIF_SYNCHRONOUS) */
|
|
|
|
#endif /* (CY_PSOC4_4000) */
|
|
|
|
return (retValue);
|
|
}
|
|
#endif /* (CY_IP_FMLT) */
|
|
|
|
|
|
/*******************************************************************************
|
|
* Function Name: CySysFlashClockRestore
|
|
********************************************************************************
|
|
*
|
|
* Summary:
|
|
* Restores the device clock configuration.
|
|
*
|
|
* Parameters:
|
|
* None
|
|
*
|
|
* Return:
|
|
* The same as CySysFlashWriteRow().
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*
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*******************************************************************************/
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static cystatus CySysFlashClockRestore(void)
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{
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cystatus retValue = CY_SYS_FLASH_SUCCESS;
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#if(!CY_IP_FM)
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#if !(CY_PSOC4_4000)
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#if (CY_IP_SPCIF_SYNCHRONOUS)
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volatile uint32 parameters[2u];
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#endif /* (CY_IP_SPCIF_SYNCHRONOUS) */
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#endif /* !(CY_PSOC4_4000) */
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#endif /* (!CY_IP_FM) */
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#if(CY_IP_FM)
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/***************************************************************
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* Restore IMO configuration that could be changed during
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* system call execution (Cypress ID #150448).
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***************************************************************/
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CY_SYS_CLK_IMO_CONFIG_REG = cySysFlashBackup.imoConfigReg;
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#else
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#if (CY_PSOC4_4000)
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/***************************************************************************
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* Perform firmware clock settings restore for the PSOC4 4000 devices (the
|
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* corresponding system call is not available).
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|
***************************************************************************/
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/* Restore clock settings */
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if ((cySysFlashBackup.clkImoFreq != 48u) ||
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((cySysFlashBackup.clkSelectReg & CY_SYS_CLK_SELECT_DIRECT_SEL_MASK) != CY_SYS_CLK_HFCLK_IMO) ||
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(((cySysFlashBackup.clkSelectReg >> CY_SYS_CLK_SELECT_PUMP_SEL_SHIFT) & CY_SYS_CLK_SELECT_PUMP_SEL_MASK) !=
|
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CY_SYS_CLK_SELECT_PUMP_SEL_IMO))
|
|
{
|
|
/* Restore IMO frequency if needed */
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if (cySysFlashBackup.clkImoFreq != 48u)
|
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{
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CySysClkWriteImoFreq(cySysFlashBackup.clkImoFreq);
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}
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|
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/* Restore HFCLK clock source */
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CySysClkWriteHfclkDirect(cySysFlashBackup.clkSelectReg & CY_SYS_CLK_SELECT_DIRECT_SEL_MASK);
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|
|
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/* Restore HFCLK divider and source for pump */
|
|
CY_SYS_CLK_SELECT_REG = cySysFlashBackup.clkSelectReg;
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|
|
|
/* Stop IMO if needed */
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|
if (0u == cySysFlashBackup.clkImoEna)
|
|
{
|
|
CySysClkImoStop();
|
|
}
|
|
}
|
|
|
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#else
|
|
|
|
#if (CY_IP_SPCIF_SYNCHRONOUS)
|
|
/* FM-Lite Clock Restore */
|
|
parameters[0u] =
|
|
(uint32) ((CY_FLASH_KEY_TWO(CY_FLASH_API_OPCODE_CLK_RESTORE) << CY_FLASH_PARAM_KEY_TWO_OFFSET) |
|
|
CY_FLASH_KEY_ONE);
|
|
parameters[1u] = (uint32) &cySysFlashBackup.clockSettings[0u];
|
|
CY_FLASH_CPUSS_SYSARG_REG = (uint32) ¶meters[0u];
|
|
CY_FLASH_CPUSS_SYSREQ_REG = CY_FLASH_CPUSS_REQ_START | CY_FLASH_API_OPCODE_CLK_RESTORE;
|
|
retValue = CY_FLASH_API_RETURN;
|
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#endif /* (CY_IP_SPCIF_SYNCHRONOUS) */
|
|
|
|
#endif /* (CY_PSOC4_4000) */
|
|
|
|
#endif /* (CY_IP_FM) */
|
|
|
|
return (retValue);
|
|
}
|
|
|
|
|
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/* [] END OF FILE */
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