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/*******************************************************************************
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* File Name: .h
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* Version 1.0
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*
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* Description:
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* This file provides constants and parameter values for the cy_lfclk Component.
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*
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********************************************************************************
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* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
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* You may use this file only in accordance with the license, terms, conditions,
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* disclaimers, and limitations in the end user license agreement accompanying
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* the software package with which this file was provided.
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*******************************************************************************/
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#if !defined(CY_LFCLK_CYLIB_H)
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#define CY_LFCLK_CYLIB_H
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#include "cytypes.h"
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#include "cydevice_trm.h"
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typedef enum
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{
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CY_SYS_TIMER_WAIT = 0u,
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CY_SYS_TIMER_INTERRUPT = 1u
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} cy_sys_timer_delaytype_enum;
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/***************************************
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* Function Prototypes
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***************************************/
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/* Clocks API */
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void CySysClkIloStart(void);
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void CySysClkIloStop(void);
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#if (CY_IP_WCO)
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void CySysClkWcoStart(void);
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void CySysClkWcoStop(void);
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uint32 CySysClkWcoSetPowerMode(uint32 mode);
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void CySysClkSetLfclkSource(uint32 source);
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uint32 CySysClkWcoEnabled(void);
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#endif /* (CY_IP_WCO) */
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typedef void (*cyWdtCallback)(void);
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#if(CY_IP_SRSSV2)
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/* WDT API */
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void CySysWdtLock(void);
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void CySysWdtUnlock(void);
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void CySysWdtSetMode(uint32 counterNum, uint32 mode);
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uint32 CySysWdtGetMode(uint32 counterNum);
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uint32 CySysWdtGetEnabledStatus(uint32 counterNum);
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void CySysWdtSetClearOnMatch(uint32 counterNum, uint32 enable);
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uint32 CySysWdtGetClearOnMatch(uint32 counterNum);
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void CySysWdtEnable(uint32 counterMask);
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void CySysWdtDisable(uint32 counterMask);
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void CySysWdtSetCascade(uint32 cascadeMask);
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uint32 CySysWdtGetCascade(void);
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void CySysWdtSetMatch(uint32 counterNum, uint32 match);
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void CySysWdtSetToggleBit(uint32 bits);
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uint32 CySysWdtGetToggleBit(void);
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uint32 CySysWdtGetMatch(uint32 counterNum);
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uint32 CySysWdtGetCount(uint32 counterNum);
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uint32 CySysWdtGetInterruptSource(void);
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void CySysWdtClearInterrupt(uint32 counterMask);
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void CySysWdtResetCounters(uint32 countersMask);
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cyWdtCallback CySysWdtSetInterruptCallback(uint32 counterNum, cyWdtCallback function);
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cyWdtCallback CySysWdtGetInterruptCallback(uint32 counterNum);
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void CySysTimerDelay(uint32 counterNum, cy_sys_timer_delaytype_enum delayType, uint32 delay);
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void CySysTimerDelayUntilMatch(uint32 counterNum, cy_sys_timer_delaytype_enum delayType, uint32 match);
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void CySysWatchdogFeed(uint32 counterNum);
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void CySysWdtEnableCounterIsr(uint32 counterNum);
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void CySysWdtDisableCounterIsr(uint32 counterNum);
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void CySysWdtIsr(void);
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#else
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/* WDT API */
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uint32 CySysWdtGetEnabledStatus(void);
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void CySysWdtEnable(void);
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void CySysWdtDisable(void);
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void CySysWdtSetMatch(uint32 match);
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uint32 CySysWdtGetMatch(void);
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uint32 CySysWdtGetCount(void);
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void CySysWdtSetIgnoreBits(uint32 bitsNum);
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uint32 CySysWdtGetIgnoreBits(void);
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void CySysWdtClearInterrupt(void);
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void CySysWdtMaskInterrupt(void);
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void CySysWdtUnmaskInterrupt(void);
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cyWdtCallback CySysWdtSetInterruptCallback(cyWdtCallback function);
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cyWdtCallback CySysWdtGetInterruptCallback(void);
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void CySysWdtIsr(void);
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#endif /* (CY_IP_SRSSV2) */
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/***************************************
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* API Constants
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***************************************/
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#define UINT16_MAX_VAL (0xFFFFu)
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/*******************************************************************************
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* Clock API Constants
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*******************************************************************************/
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/* CySysClkIloStart()/CySysClkIloStop() - implementation definitions */
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#define CY_SYS_CLK_ILO_CONFIG_ENABLE (( uint32 )(( uint32 )0x01u << 31u))
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/* CySysClkSetLfclkSource() - parameter definitions */
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#if (CY_IP_WCO)
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#define CY_SYS_CLK_LFCLK_SRC_ILO (0u)
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#define CY_SYS_CLK_LFCLK_SRC_WCO (( uint32 )(( uint32 )0x01u << 30u))
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#endif /* (CY_IP_WCO) */
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/* CySysClkSetLfclkSource() - implementation definitions */
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#if (CY_IP_WCO)
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#define CY_SYS_CLK_LFCLK_SEL_MASK (( uint32 )(( uint32 )0x03u << 30u))
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#endif /* (CY_IP_WCO) */
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#if (CY_IP_WCO)
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/* WCO Configuration Register */
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#define CY_SYS_CLK_WCO_CONFIG_LPM_EN (( uint32 )(( uint32 )0x01u << 0u))
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#define CY_SYS_CLK_WCO_CONFIG_LPM_AUTO (( uint32 )(( uint32 )0x01u << 1u))
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#define CY_SYS_CLK_WCO_CONFIG_LPM_ENABLE (( uint32 )(( uint32 )0x01u << 31u))
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/* WCO Status Register */
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#define CY_SYS_CLK_WCO_STATUS_OUT_BLNK_A (( uint32 )(( uint32 )0x01u << 0u))
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/* WCO Trim Register */
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#define CY_SYS_CLK_WCO_TRIM_XGM_MASK (( uint32 ) 0x07u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_SHIFT (( uint32 ) 0x00u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_3370NA (( uint32 ) 0x00u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_2620NA (( uint32 ) 0x01u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_2250NA (( uint32 ) 0x02u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_1500NA (( uint32 ) 0x03u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_1870NA (( uint32 ) 0x04u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_1120NA (( uint32 ) 0x05u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_750NA (( uint32 ) 0x06u)
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#define CY_SYS_CLK_WCO_TRIM_XGM_0NA (( uint32 ) 0x07u)
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#define CY_SYS_CLK_WCO_TRIM_GM_MASK (( uint32 )(( uint32 )0x03u << 4u))
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#define CY_SYS_CLK_WCO_TRIM_GM_SHIFT (( uint32 ) 0x04u)
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#define CY_SYS_CLK_WCO_TRIM_GM_HPM (( uint32 ) 0x01u)
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#define CY_SYS_CLK_WCO_TRIM_GM_LPM (( uint32 ) 0x02u)
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#endif /* (CY_IP_WCO) */
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/*******************************************************************************
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* WDT API Constants
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*******************************************************************************/
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#if(CY_IP_SRSSV2)
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#define CY_SYS_WDT_MODE_NONE (0u)
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#define CY_SYS_WDT_MODE_INT (1u)
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#define CY_SYS_WDT_MODE_RESET (2u)
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#define CY_SYS_WDT_MODE_INT_RESET (3u)
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#define CY_SYS_WDT_COUNTER0_MASK ((uint32)((uint32)0x01u))
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#define CY_SYS_WDT_COUNTER1_MASK ((uint32)((uint32)0x01u << 8u))
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#define CY_SYS_WDT_COUNTER2_MASK ((uint32)((uint32)0x01u << 16u))
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#define CY_SYS_WDT_CASCADE_NONE ((uint32)0x00u)
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#define CY_SYS_WDT_CASCADE_01 ((uint32)0x01u << 3u)
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#define CY_SYS_WDT_CASCADE_12 ((uint32)0x01u << 11u)
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#define CY_SYS_WDT_COUNTER0_INT ((uint32)0x01u << 2u)
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#define CY_SYS_WDT_COUNTER1_INT ((uint32)0x01u << 10u)
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#define CY_SYS_WDT_COUNTER2_INT ((uint32)0x01u << 18u)
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#define CY_SYS_WDT_COUNTER0_RESET ((uint32)0x01u << 3u)
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#define CY_SYS_WDT_COUNTER1_RESET ((uint32)0x01u << 11u)
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#define CY_SYS_WDT_COUNTER2_RESET ((uint32)0x01u << 19u)
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#define CY_SYS_WDT_COUNTERS_RESET (CY_SYS_WDT_COUNTER0_RESET |\
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CY_SYS_WDT_COUNTER1_RESET |\
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CY_SYS_WDT_COUNTER2_RESET)
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#define CY_SYS_WDT_COUNTER0 (0x00u)
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#define CY_SYS_WDT_COUNTER1 (0x01u)
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#define CY_SYS_WDT_COUNTER2 (0x02u)
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#define CY_SYS_WDT_COUNTER0_OFFSET (0x00u)
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#define CY_SYS_WDT_COUNTER1_OFFSET (0x02u)
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#define CY_SYS_WDT_COUNTER2_OFFSET (0x04u)
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#define CY_SYS_WDT_MODE_MASK ((uint32)(0x03u))
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#define CY_SYS_WDT_CLK_LOCK_BITS_MASK ((uint32)0x03u << 14u)
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#define CY_SYS_WDT_CLK_LOCK_BIT0 ((uint32)0x01u << 14u)
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#define CY_SYS_WDT_CLK_LOCK_BIT1 ((uint32)0x01u << 15u)
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#define CY_SYS_WDT_CONFIG_BITS2_MASK (uint32)(0x1Fu)
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#define CY_SYS_WDT_CONFIG_BITS2_POS (uint32)(24u)
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#define CY_SYS_WDT_LOWER_16BITS_MASK (uint32)(0x0000FFFFu)
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#define CY_SYS_WDT_HIGHER_16BITS_MASK (uint32)(0xFFFF0000u)
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#define CY_SYS_WDT_COUNTERS_MAX (0x03u)
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#define CY_SYS_WDT_CNT_SHIFT (0x08u)
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#define CY_SYS_WDT_CNT_MATCH_CLR_SHIFT (0x02u)
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#define CY_SYS_WDT_CNT_STTS_SHIFT (0x01u)
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#define CY_SYS_WDT_CNT_MATCH_SHIFT (0x10u)
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#define CY_WDT_NUM_OF_WDT (3u)
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#define CY_WDT_NUM_OF_CALLBACKS (3u)
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#if (CY_PSOC4_4100 || CY_PSOC4_4200)
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#define CY_SYS_WDT_1LFCLK_DELAY_US ((uint16)( 67u))
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#define CY_SYS_WDT_3LFCLK_DELAY_US ((uint16)(201u))
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#endif /* (CY_PSOC4_4100 || CY_PSOC4_4200) */
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#if (CY_PSOC4_4000)
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#define CY_SYS_WDT_1LFCLK_DELAY_US ((uint16)( 50u))
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#define CY_SYS_WDT_3LFCLK_DELAY_US ((uint16)(150u))
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#endif /* (CY_PSOC4_4000) */
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#if (CY_IP_WCO)
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#define CY_SYS_WDT_1LFCLK_DELAY_US \
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((CY_SYS_CLK_LFCLK_SRC_ILO == (CY_SYS_WDT_CONFIG_REG & CY_SYS_CLK_LFCLK_SEL_MASK)) ? \
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((uint16)(67u)) : \
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((uint16)(31u)))
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#define CY_SYS_WDT_3LFCLK_DELAY_US \
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((CY_SYS_CLK_LFCLK_SRC_ILO == (CY_SYS_WDT_CONFIG_REG & CY_SYS_CLK_LFCLK_SEL_MASK)) ? \
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((uint16)(201u)) : \
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((uint16)(93u)))
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#endif /* (CY_IP_WCO) */
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#else
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#define CY_SYS_WDT_KEY ((uint32)(0xACED8865u))
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#define CY_SYS_WDT_MATCH_MASK ((uint32)(0x0000FFFFu))
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#define CY_SYS_WDT_IGNORE_BITS_MASK ((uint32)(0x000F0000u))
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#define CY_SYS_WDT_IGNORE_BITS_SHIFT ((uint32)(16u))
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#define CY_SYS_WDT_LOWER_BIT_MASK ((uint32)(0x00000001u))
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#define CY_SYS_WDT_COUNTER0 (0x00u)
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#define CY_WDT_NUM_OF_WDT (1u)
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#define CY_WDT_NUM_OF_CALLBACKS (3u)
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#endif /* (CY_IP_SRSSV2) */
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#define CY_INT_WDT_IRQN (7u)
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/* CySysXTAL_32KHZ_SetPowerMode() */
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#define CY_SYS_CLK_WCO_HPM (0x0u)
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#if(0u == (CY_PSOC4_4100M || CY_PSOC4_4200M))
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#define CY_SYS_CLK_WCO_LPM (0x1u)
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#endif /* (0u == (CY_PSOC4_4100M || CY_PSOC4_4200M)) */
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#define CY_SYS_CLK_ILO_CONFIG_REG (*(reg32 *) CYREG_CLK_ILO_CONFIG)
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#define CY_SYS_CLK_ILO_CONFIG_PTR ( (reg32 *) CYREG_CLK_ILO_CONFIG)
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#if(CY_IP_SRSSV2)
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#define CY_SYS_CLK_ILO_TRIM_REG (*(reg32 *) CYREG_CLK_ILO_TRIM)
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#define CY_SYS_CLK_ILO_TRIM_PTR ( (reg32 *) CYREG_CLK_ILO_TRIM)
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#endif /* (CY_IP_SRSSV2) */
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#if (CY_IP_WCO)
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#if (CY_PSOC4_4100BL || CY_PSOC4_4200BL)
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/* WCO Status Register */
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#define CY_SYS_CLK_WCO_STATUS_REG (*(reg32 *) CYREG_BLE_BLESS_WCO_STATUS)
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#define CY_SYS_CLK_WCO_STATUS_PTR ( (reg32 *) CYREG_BLE_BLESS_WCO_STATUS)
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/* WCO Configuration Register */
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#define CY_SYS_CLK_WCO_CONFIG_REG (*(reg32 *) CYREG_BLE_BLESS_WCO_CONFIG)
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#define CY_SYS_CLK_WCO_CONFIG_PTR ( (reg32 *) CYREG_BLE_BLESS_WCO_CONFIG)
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/* WCO Trim Register */
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#define CY_SYS_CLK_WCO_TRIM_REG (*(reg32 *) CYREG_BLE_BLESS_WCO_TRIM)
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#define CY_SYS_CLK_WCO_TRIM_PTR ( (reg32 *) CYREG_BLE_BLESS_WCO_TRIM)
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#else /* (CY_PSOC4_4100M || CY_PSOC4_4200M) */
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/* WCO Status Register */
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#define CY_SYS_CLK_WCO_STATUS_REG (*(reg32 *) CYREG_WCO_STATUS)
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#define CY_SYS_CLK_WCO_STATUS_PTR ( (reg32 *) CYREG_WCO_STATUS)
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/* WCO Configuration Register */
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#define CY_SYS_CLK_WCO_CONFIG_REG (*(reg32 *) CYREG_WCO_CONFIG)
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#define CY_SYS_CLK_WCO_CONFIG_PTR ( (reg32 *) CYREG_WCO_CONFIG)
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/* WCO Trim Register */
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#define CY_SYS_CLK_WCO_TRIM_REG (*(reg32 *) CYREG_WCO_TRIM)
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#define CY_SYS_CLK_WCO_TRIM_PTR ( (reg32 *) CYREG_WCO_TRIM)
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#endif /* (CY_PSOC4_4100BL || CY_PSOC4_4200BL) */
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#endif /* (CY_IP_WCO) */
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/*******************************************************************************
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* WDT API Registers
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*******************************************************************************/
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#if(CY_IP_SRSSV2)
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#define CY_SYS_WDT_CTRLOW_REG (*(reg32 *) CYREG_WDT_CTRLOW)
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#define CY_SYS_WDT_CTRLOW_PTR ( (reg32 *) CYREG_WDT_CTRLOW)
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#define CY_SYS_WDT_CTRHIGH_REG (*(reg32 *) CYREG_WDT_CTRHIGH)
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#define CY_SYS_WDT_CTRHIGH_PTR ( (reg32 *) CYREG_WDT_CTRHIGH)
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#define CY_SYS_WDT_MATCH_REG (*(reg32 *) CYREG_WDT_MATCH)
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#define CY_SYS_WDT_MATCH_PTR ( (reg32 *) CYREG_WDT_MATCH)
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#define CY_SYS_WDT_CONFIG_REG (*(reg32 *) CYREG_WDT_CONFIG)
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#define CY_SYS_WDT_CONFIG_PTR ( (reg32 *) CYREG_WDT_CONFIG)
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#define CY_SYS_WDT_CONTROL_REG (*(reg32 *) CYREG_WDT_CONTROL)
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#define CY_SYS_WDT_CONTROL_PTR ( (reg32 *) CYREG_WDT_CONTROL)
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#else
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#define CY_SYS_WDT_DISABLE_KEY_REG (*(reg32 *) CYREG_WDT_DISABLE_KEY)
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#define CY_SYS_WDT_DISABLE_KEY_PTR ( (reg32 *) CYREG_WDT_DISABLE_KEY)
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#define CY_SYS_WDT_MATCH_REG (*(reg32 *) CYREG_WDT_MATCH)
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#define CY_SYS_WDT_MATCH_PTR ( (reg32 *) CYREG_WDT_MATCH)
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#define CY_SYS_WDT_COUNTER_REG (*(reg32 *) CYREG_WDT_COUNTER)
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#define CY_SYS_WDT_COUNTER_PTR ( (reg32 *) CYREG_WDT_COUNTER)
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#define CY_SYS_SRSS_INTR_REG (*(reg32 *) CYREG_SRSS_INTR)
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#define CY_SYS_SRSS_INTR_PTR ( (reg32 *) CYREG_SRSS_INTR)
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#define CY_SYS_SRSS_INTR_MASK_REG (*(reg32 *) CYREG_SRSS_INTR_MASK)
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#define CY_SYS_SRSS_INTR_MASK_PTR ( (reg32 *) CYREG_SRSS_INTR_MASK)
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#endif /* (CY_IP_SRSSV2) */
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#if (CY_IP_WCO)
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/*******************************************************************************
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* Function Name: CySysClkWcoSetHighPowerMode
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********************************************************************************
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*
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* Summary:
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* Sets the high power mode for the 32 KHz WCO.
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*
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* Parameters:
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* None.
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*
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* Return:
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* None.
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*
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* Side Effects:
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* None.
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*
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*******************************************************************************/
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static CY_INLINE void CySysClkWcoSetHighPowerMode(void)
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{
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/* Switch off low power mode for WCO */
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CY_SYS_CLK_WCO_CONFIG_REG &= (uint32) ~CY_SYS_CLK_WCO_CONFIG_LPM_EN;
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/* Switch off auto low power mode in WCO */
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CY_SYS_CLK_WCO_CONFIG_REG &= ((uint32)~CY_SYS_CLK_WCO_CONFIG_LPM_AUTO);
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/* Restore WCO trim register HPM settings */
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CY_SYS_CLK_WCO_TRIM_REG = (CY_SYS_CLK_WCO_TRIM_REG & (uint32)(~CY_SYS_CLK_WCO_TRIM_GM_MASK)) \
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| (uint32)(CY_SYS_CLK_WCO_TRIM_GM_HPM << CY_SYS_CLK_WCO_TRIM_GM_SHIFT);
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CY_SYS_CLK_WCO_TRIM_REG = (CY_SYS_CLK_WCO_TRIM_REG & (uint32)(~CY_SYS_CLK_WCO_TRIM_XGM_MASK)) \
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| (uint32)(CY_SYS_CLK_WCO_TRIM_XGM_2620NA << CY_SYS_CLK_WCO_TRIM_XGM_SHIFT);
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}
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#if(!CY_PSOC4_4100M && !CY_PSOC4_4200M)
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/*******************************************************************************
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* Function Name: CySysClkWcoSetLowPowerMode
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********************************************************************************
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*
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* Summary:
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* Sets the low power mode for the 32 KHz WCO.
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*
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* Parameters:
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* None.
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*
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* Return:
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* None.
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*
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* Side Effects:
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* None.
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*
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*******************************************************************************/
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static CY_INLINE void CySysClkWcoSetLowPowerMode(void)
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{
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/* Switch off auto low power mode in WCO */
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CY_SYS_CLK_WCO_CONFIG_REG &= ((uint32)~CY_SYS_CLK_WCO_CONFIG_LPM_AUTO);
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/* Change WCO trim register settings to LPM */
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CY_SYS_CLK_WCO_TRIM_REG = (CY_SYS_CLK_WCO_TRIM_REG & (uint32)(~CY_SYS_CLK_WCO_TRIM_XGM_MASK)) \
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| (uint32)(CY_SYS_CLK_WCO_TRIM_XGM_2250NA << CY_SYS_CLK_WCO_TRIM_XGM_SHIFT);
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CY_SYS_CLK_WCO_TRIM_REG = (CY_SYS_CLK_WCO_TRIM_REG & (uint32)(~CY_SYS_CLK_WCO_TRIM_GM_MASK)) \
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| (uint32)(CY_SYS_CLK_WCO_TRIM_GM_LPM << CY_SYS_CLK_WCO_TRIM_GM_SHIFT);
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/* Switch on low power mode for WCO */
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CY_SYS_CLK_WCO_CONFIG_REG |= CY_SYS_CLK_WCO_CONFIG_LPM_EN;
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}
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#endif /* (!CY_PSOC4_4100M && !CY_PSOC4_4200M) */
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#endif /* (CY_IP_WCO) */
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/* These defines are intended to maintain the backward compatibility for
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* projects which use cy_boot_v4_20 or earlier.
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*/
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#define CySysWdtWriteMode CySysWdtSetMode
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#define CySysWdtReadMode CySysWdtGetMode
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#define CySysWdtWriteClearOnMatch CySysWdtSetClearOnMatch
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#define CySysWdtReadClearOnMatch CySysWdtGetClearOnMatch
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#define CySysWdtReadEnabledStatus CySysWdtGetEnabledStatus
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#define CySysWdtWriteCascade CySysWdtSetCascade
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#define CySysWdtReadCascade CySysWdtGetCascade
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#define CySysWdtWriteMatch CySysWdtSetMatch
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#define CySysWdtWriteToggleBit CySysWdtSetToggleBit
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#define CySysWdtReadToggleBit CySysWdtGetToggleBit
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#define CySysWdtReadMatch CySysWdtGetMatch
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#define CySysWdtReadCount CySysWdtGetCount
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#define CySysWdtWriteIgnoreBits CySysWdtSetIgnoreBits
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#define CySysWdtReadIgnoreBits CySysWdtGetIgnoreBits
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#define CySysWdtSetIsrCallback CySysWdtSetInterruptCallback
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#define CySysWdtGetIsrCallback CySysWdtGetInterruptCallback
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#endif /* (CY_LFCLK_CYLIB_H) */
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/* [] END OF FILE */
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