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/*******************************************************************************
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* File Name: cypins.h
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* Version 5.0
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*
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* Description:
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* This file contains the function prototypes and constants used for port/pin
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* in access and control.
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*
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* Note:
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* Documentation of the API's in this file is located in the
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* System Reference Guide provided with PSoC Creator.
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*
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********************************************************************************
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* Copyright 2008-2015, Cypress Semiconductor Corporation. All rights reserved.
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* You may use this file only in accordance with the license, terms, conditions,
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* disclaimers, and limitations in the end user license agreement accompanying
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* the software package with which this file was provided.
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*******************************************************************************/
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#if !defined(CY_BOOT_CYPINS_H)
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#define CY_BOOT_CYPINS_H
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#include "cytypes.h"
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/**************************************
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* Register Constants
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**************************************/
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#define CY_SYS_PINS_PC_DATAOUT ((uint32) 0x01u)
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#define CY_SYS_PINS_PC_DRIVE_MODE_BITS ((uint32) 0x03u)
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#define CY_SYS_PINS_PC_DRIVE_MODE_MASK ((uint32) 0x07u)
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/**************************************
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* API Parameter Constants
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**************************************/
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/* SetPinDriveMode */
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#define CY_SYS_PINS_DM_ALG_HIZ ((uint32) 0x00u)
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#define CY_SYS_PINS_DM_DIG_HIZ ((uint32) 0x01u)
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#define CY_SYS_PINS_DM_RES_UP ((uint32) 0x02u)
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#define CY_SYS_PINS_DM_RES_DWN ((uint32) 0x03u)
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#define CY_SYS_PINS_DM_OD_LO ((uint32) 0x04u)
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#define CY_SYS_PINS_DM_OD_HI ((uint32) 0x05u)
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#define CY_SYS_PINS_DM_STRONG ((uint32) 0x06u)
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#define CY_SYS_PINS_DM_RES_UPDWN ((uint32) 0x07u)
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/**************************************
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* Compatibility Macros
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**************************************/
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#if(CY_PSOC4A)
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#define CYREG_GPIO_PRT0_DR (CYREG_PRT0_DR)
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#define CYREG_GPIO_PRT0_PS (CYREG_PRT0_PS)
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#define CYREG_GPIO_PRT0_PC (CYREG_PRT0_PC)
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#define CYREG_GPIO_PRT1_DR (CYREG_PRT1_DR)
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#define CYREG_GPIO_PRT1_PS (CYREG_PRT1_PS)
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#define CYREG_GPIO_PRT1_PC (CYREG_PRT1_PC)
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#define CYREG_GPIO_PRT2_DR (CYREG_PRT2_DR)
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#define CYREG_GPIO_PRT2_PS (CYREG_PRT2_PS)
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#define CYREG_GPIO_PRT2_PC (CYREG_PRT2_PC)
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#define CYREG_GPIO_PRT3_DR (CYREG_PRT3_DR)
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#define CYREG_GPIO_PRT3_PS (CYREG_PRT3_PS)
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#define CYREG_GPIO_PRT3_PC (CYREG_PRT3_PC)
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#define CYREG_GPIO_PRT4_DR (CYREG_PRT4_DR)
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#define CYREG_GPIO_PRT4_PS (CYREG_PRT4_PS)
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#define CYREG_GPIO_PRT4_PC (CYREG_PRT4_PC)
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#else
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#define CYREG_PRT0_DR (CYREG_GPIO_PRT0_DR)
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#define CYREG_PRT0_PS (CYREG_GPIO_PRT0_PS)
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#define CYREG_PRT0_PC (CYREG_GPIO_PRT0_PC)
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#define CYREG_PRT1_DR (CYREG_GPIO_PRT1_DR)
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#define CYREG_PRT1_PS (CYREG_GPIO_PRT1_PS)
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#define CYREG_PRT1_PC (CYREG_GPIO_PRT1_PC)
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#define CYREG_PRT2_DR (CYREG_GPIO_PRT2_DR)
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#define CYREG_PRT2_PS (CYREG_GPIO_PRT2_PS)
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#define CYREG_PRT2_PC (CYREG_GPIO_PRT2_PC)
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#define CYREG_PRT3_DR (CYREG_GPIO_PRT3_DR)
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#define CYREG_PRT3_PS (CYREG_GPIO_PRT3_PS)
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#define CYREG_PRT3_PC (CYREG_GPIO_PRT3_PC)
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#define CYREG_PRT4_DR (CYREG_GPIO_PRT4_DR)
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#define CYREG_PRT4_PS (CYREG_GPIO_PRT4_PS)
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#define CYREG_PRT4_PC (CYREG_GPIO_PRT4_PC)
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#define CYREG_PRT5_DR (CYREG_GPIO_PRT5_DR)
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#define CYREG_PRT5_PS (CYREG_GPIO_PRT5_PS)
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#define CYREG_PRT5_PC (CYREG_GPIO_PRT5_PC)
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#define CYREG_PRT6_DR (CYREG_GPIO_PRT6_DR)
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#define CYREG_PRT6_PS (CYREG_GPIO_PRT6_PS)
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#define CYREG_PRT6_PC (CYREG_GPIO_PRT6_PC)
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#define CYREG_PRT7_DR (CYREG_GPIO_PRT7_DR)
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#define CYREG_PRT7_PS (CYREG_GPIO_PRT7_PS)
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#define CYREG_PRT7_PC (CYREG_GPIO_PRT7_PC)
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#define CYREG_PRT8_DR (CYREG_GPIO_PRT8_DR)
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#define CYREG_PRT8_PS (CYREG_GPIO_PRT8_PS)
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#define CYREG_PRT8_PC (CYREG_GPIO_PRT8_PC)
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#define CYREG_PRT9_DR (CYREG_GPIO_PRT9_DR)
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#define CYREG_PRT9_PS (CYREG_GPIO_PRT9_PS)
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#define CYREG_PRT9_PC (CYREG_GPIO_PRT9_PC)
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#define CYREG_PRT10_DR (CYREG_GPIO_PRT10_DR)
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#define CYREG_PRT10_PS (CYREG_GPIO_PRT10_PS)
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#define CYREG_PRT10_PC (CYREG_GPIO_PRT10_PC)
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#define CYREG_PRT11_DR (CYREG_GPIO_PRT11_DR)
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#define CYREG_PRT11_PS (CYREG_GPIO_PRT11_PS)
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#define CYREG_PRT11_PC (CYREG_GPIO_PRT11_PC)
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#define CYREG_PRT12_DR (CYREG_GPIO_PRT12_DR)
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#define CYREG_PRT12_PS (CYREG_GPIO_PRT12_PS)
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#define CYREG_PRT12_PC (CYREG_GPIO_PRT12_PC)
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#define CYREG_PRT13_DR (CYREG_GPIO_PRT13_DR)
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#define CYREG_PRT13_PS (CYREG_GPIO_PRT13_PS)
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#define CYREG_PRT13_PC (CYREG_GPIO_PRT13_PC)
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#define CYREG_PRT14_DR (CYREG_GPIO_PRT14_DR)
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#define CYREG_PRT14_PS (CYREG_GPIO_PRT14_PS)
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#define CYREG_PRT14_PC (CYREG_GPIO_PRT14_PC)
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#define CYREG_PRT15_DR (CYREG_GPIO_PRT15_DR)
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#define CYREG_PRT15_PS (CYREG_GPIO_PRT15_PS)
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#define CYREG_PRT15_PC (CYREG_GPIO_PRT15_PC)
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#endif /* (CY_PSOC4A) */
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/**************************************
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* Pin API Macros
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**************************************/
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/*******************************************************************************
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* Macro Name: CY_SYS_PINS_READ_PIN
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********************************************************************************
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* Summary:
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* Reads the current value on the pin (pin state, PS).
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*
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* Parameters:
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* portPS: Address of the port pin status register (uint32).
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* Definitions for each port are provided in the cydevice_trm.h file in the
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* form: CYREG_GPIO_PRTx_PS, where x is a port number. The actual number
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* depends on the selected device.
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*
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* pin: pin number 0 - 7. The actual number depends on the selected device.
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*
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* Return:
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* Pin state:
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* 0: Logic low value
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* Non-0: Logic high value
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*
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*******************************************************************************/
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#define CY_SYS_PINS_READ_PIN(portPS, pin) \
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(( *(reg32 *)(portPS) >> (pin)) & CY_SYS_PINS_PC_DATAOUT)
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/*******************************************************************************
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* Macro Name: CY_SYS_PINS_SET_PIN
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********************************************************************************
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* Summary:
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* Set the output value for the pin (data register, DR) to a logic high.
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* Note that this only has an effect for pins configured as software pins that
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* are not driven by hardware.
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*
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* The macro operation is not atomic. It is not guaranteed that shared register
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* will remain uncorrupted during simultaneous read-modify-write operations
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* performed by two threads (main and interrupt threads). To guarantee data
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* integrity in such cases, the macro should be invoked while the specific
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* interrupt is disabled or within critical section (all interrupts are
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* disabled).
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*
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* Parameters:
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* portDR:
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* Address of the port output pin data register (uint32).
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* Definitions for each port are provided in the cydevice_trm.h file in the
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* form: CYREG_GPIO_PRTx_PS, where x is a port number. The actual number
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* depends on the selected device.
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*
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* pin: pin number 0 - 7. The actual number depends on the selected device.
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*
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* Return:
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* None
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*
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*******************************************************************************/
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#define CY_SYS_PINS_SET_PIN(portDR, pin) \
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( *(reg32 *)(portDR) |= (CY_SYS_PINS_PC_DATAOUT << (pin)) )
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/*******************************************************************************
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* Macro Name: CY_SYS_PINS_CLEAR_PIN
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********************************************************************************
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* Summary:
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* This macro sets the state of the specified pin to zero.
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*
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* The macro operation is not atomic. It is not guaranteed that shared register
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* will remain uncorrupted during simultaneous read-modify-write operations
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* performed by two threads (main and interrupt threads). To guarantee data
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* integrity in such cases, the macro should be invoked while the specific
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* interrupt is disabled or within critical section (all interrupts are
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* disabled).
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*
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* Parameters:
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* portDR: Address of the port output pin data register (uint32).
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* Definitions for each port are provided in the cydevice_trm.h file in the
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* form: CYREG_GPIO_PRTx_PS, where x is a port number. The actual number
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* depends on the selected device.
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*
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* pin: pin number 0 - 7. The actual number depends on the selected device.
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*
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* Return:
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* None
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*
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*******************************************************************************/
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#define CY_SYS_PINS_CLEAR_PIN(portDR, pin) \
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( *(reg32 *)(portDR) &= ~(CY_SYS_PINS_PC_DATAOUT << (pin)) )
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/*******************************************************************************
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* Macro Name: CY_SYS_PINS_SET_DRIVE_MODE
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********************************************************************************
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* Summary:
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* Sets the drive mode for the pin (DM).
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*
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* The macro operation is not atomic. It is not guaranteed that shared register
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* will remain uncorrupted during simultaneous read-modify-write operations
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* performed by two threads (main and interrupt threads). To guarantee data
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* integrity in such cases, the macro should be invoked while the specific
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* interrupt is disabled or within critical section (all interrupts are
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* disabled).
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*
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* Parameters:
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* portPC: Address of the port configuration register (uint32).
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* Definitions for each port are provided in the cydevice_trm.h file in the
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* form: CYREG_GPIO_PRTx_PS, where x is a port number. The actual number
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* depends on the selected device.
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*
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* pin: pin number 0 - 7. The actual number depends on the selected device.
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*
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* mode: Desired drive mode
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*
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* Define Source
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* CY_SYS_PINS_DM_ALG_HIZ Analog HiZ
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* CY_SYS_PINS_DM_DIG_HIZ Digital HiZ
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* CY_SYS_PINS_DM_RES_UP Resistive pull up
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* CY_SYS_PINS_DM_RES_DWN Resistive pull down
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* CY_SYS_PINS_DM_OD_LO Open drain - drive low
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* CY_SYS_PINS_DM_OD_HI Open drain - drive high
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* CY_SYS_PINS_DM_STRONG Strong CMOS Output
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* CY_SYS_PINS_DM_RES_UPDWN Resistive pull up/down
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*
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* Return:
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* None
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*
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*******************************************************************************/
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#define CY_SYS_PINS_SET_DRIVE_MODE(portPC, pin, mode) \
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( *(reg32 *)(portPC) = (*(reg32 *)(portPC) & \
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~(CY_SYS_PINS_PC_DRIVE_MODE_MASK << ((pin) * CY_SYS_PINS_PC_DRIVE_MODE_BITS))) | \
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((mode) << ((pin) * CY_SYS_PINS_PC_DRIVE_MODE_BITS)))
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/*******************************************************************************
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* Macro Name: CY_SYS_PINS_READ_DRIVE_MODE
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********************************************************************************
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* Summary:
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* Reads the drive mode for the pin (DM).
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*
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* Parameters:
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* portPC: Address of the port configuration register (uint32).
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* Definitions for each port are provided in the cydevice_trm.h file in the
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* form: CYREG_GPIO_PRTx_PS, where x is a port number. The actual number
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* depends on the selected device.
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*
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* pin: pin number 0 - 7. The actual number depends on the selected device.
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*
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*
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* Return:
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* mode: Current drive mode for the pin
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*
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* Define Source
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* CY_SYS_PINS_DM_ALG_HIZ Analog HiZ
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* CY_SYS_PINS_DM_DIG_HIZ Digital HiZ
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* CY_SYS_PINS_DM_RES_UP Resistive pull up
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* CY_SYS_PINS_DM_RES_DWN Resistive pull down
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* CY_SYS_PINS_DM_OD_LO Open drain - drive low
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* CY_SYS_PINS_DM_OD_HI Open drain - drive high
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* CY_SYS_PINS_DM_STRONG Strong CMOS Output
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* CY_SYS_PINS_DM_RES_UPDWN Resistive pull up/down
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*
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*******************************************************************************/
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#define CY_SYS_PINS_READ_DRIVE_MODE(portPC, pin) \
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(( *(reg32 *)(portPC) & \
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(CY_SYS_PINS_PC_DRIVE_MODE_MASK << ((pin) * CY_SYS_PINS_PC_DRIVE_MODE_BITS)) ) >> \
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(pin) * CY_SYS_PINS_PC_DRIVE_MODE_BITS)
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/* Defines function macros for mapping PSoC 4 per-pin functions to PSoC 3/5LP style functions */
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#define CyPins_ReadPin(name) (CY_SYS_PINS_READ_PIN (name ## _PS, name ## _SHIFT))
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#define CyPins_SetPin(name) (CY_SYS_PINS_SET_PIN (name ## _DR, name ## _SHIFT))
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#define CyPins_ClearPin(name) (CY_SYS_PINS_CLEAR_PIN (name ## _DR, name ## _SHIFT))
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#define CyPins_SetPinDriveMode(name, mode) (CY_SYS_PINS_SET_DRIVE_MODE (name ## _PC, name ## _SHIFT, mode))
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#define CyPins_ReadPinDriveMode(name) (CY_SYS_PINS_READ_DRIVE_MODE(name ## _PC, name ## _SHIFT))
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#endif /* (CY_BOOT_CYPINS_H) */
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/* [] END OF FILE */
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